Risc-V规定,如果支持单精度浮点指令或者双精度浮点指令,四精度浮点指令,则需要增加一组独立的通用浮点寄存器组,包括32个通用浮点寄存器,标号位f0到f31。如果仅支持F扩展指令子集,则每个通用寄存器是32位的,如果支持D扩展指令子集,则每个通用寄存器是64位的,如果支持Q扩展指令集,则每个浮点通用寄存器是128位的。
如果处理器同时支持 RV32F 和 RV32D 扩展,则单精度数据仅使用 f 寄存器中的低 32位。与 RV32I 中的 x0 不同,寄存器 f0 不是硬连线到常量 0, 而是和所有其他 31 个 f 寄存器一样,是一个可变寄存器。下面是32位和64位浮点寄存器的名字,别名和注释。
63-32 | 31-0(名字和别名) | 注释 |
| f0/ft0 | FP Temporary |
| f1/ft1 | FP Temporary |
| f2/ft2 | FP Temporary |
| f3/ft3 | FP Temporary |
| f4/ft4 | FP Temporary |
| f5/ft5 | FP Temporary |
| f6/ft6 | FP Temporary |
| f7/ft7 | FP Temporary |
| f8 / fs0 | FP Saved register |
| f9 / fs1 | FP Saved register |
| f10 / fa0 | FP Function argument, return value |
| f11 / fa1 | FP Function argument, return value |
| f12 / fa2 | FP Function argument |
| f13 / fa3 | FP Function argument |
| f14 / fa4 | FP Function argument |
| f15 / fa5 | FP Function argument |
| f16 / fa6 | FP Function argument |
| f17 / fa7 | FP Function argument |
| f18 / fs2 | FP Saved register |
| f19 / fs3 | FP Saved register |
| f20 / fs4 | FP Saved register |
| f21 / fs5 | FP Saved register |
| f22 / fs6 | FP Saved register |
| f23 / fs7 | FP Saved register |
| f24 / fs8 | FP Saved register |
| f25 / fs9 | FP Saved register |
| f26 / fs10 | FP Saved register |
| f27 / fs11 | FP Saved register |
| f28 / ft8 | FP Temporary |
| f29 / ft9 | FP Temporary |
| f30 / ft10 | FP Temporary |
| f31 / ft11 | FP Temporary |
Risc-V架构规定,如果支持浮点指令,需要增加一个浮点控制状态寄存器fcsr,该寄存器是一个可读可写的csr寄存器。
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | Rounding mode(frm) | accrued exceptions(fflags) |
| | | | | | | | | | | | | | | | | | | | | | | | | | | NV | DZ | OF | UF | NX |
fcsr寄存器包含浮点异常标志域(fflags),不同的标志位表示不同的异常类型。如果浮点运算单元在运算中出现了相应的异常,则会将fcsr寄存器中对应的标志位设置为1,且会一直保持累积。软件可以通过写0的方式单独清除某个异常标志位。
flag mnemonic | flag meaning |
NV | invalid operation |
DZ | divide by zero |
OF | overflow |
UF | underflow |
NX | inexact,不精确 |
根据IEEE-754标准,浮点运算需要指定舍入模式(rounding mode),这有助于确定误差范围和编写数值库。最准确且最常见的舍入模式是舍入到最近的偶数(RNE)。舍入模式可以通过浮点控制和状态寄存器 fcsr 进行设置。
Risc-V架构浮点运算的舍入模式可以通过两种方式指定。
使用静态舍入模式,浮点指令编码中有3位作为舍入模式域,不同的舍入模式编码如下图,Risc-V支持5种合法的舍入模式。如果舍入模式编码为101或110,则为非法模式;如果舍入模式编码为111,则意味着使用动态舍入模式。如果使用动态舍入模式,则使用fcsr寄存器中的舍入模式域,舍入模式域定义如上图,如果fcsr寄存器中的舍入模式域指定为非法的舍入模式,则后续浮点指令会产生非法指令异常。
rounding mode | mnemonic | meaning |
000 | RNE | round to nearest ties to even,舍入到最近的偶数 |
001 | RTZ | round towards zero 向零舍入 |
010 | RDN | round down(towards -∞),向负无穷舍入 |
011 | RUP | round up(towards +∞),向正无穷舍入 |
100 | RMM | round to nearest ties to max magnitude,向最近的最大值舍入 |
101 | | invalid reserved for future use |
110 | | invalid reserved for future use |
111 | | in instruction's rm field, selects dynamic rounding mode;
in rounding mode register, invalid. |
如果处理器不想使用浮点单元,比如把浮点单元关电以节省功耗,可以使用csr写指令将mstatus寄存器的FS域设置成0,将浮点单元的功能予以关闭。当浮点单元功能关闭后,任何访问浮点csr寄存器的操作或者执行浮点指令的行为将会产生非法指令异常。
Risc-V规定,对于非规格化数(subnormal Numbers)的处理完全遵循IEEE754定义。根据IEEE-754标准,在浮点数的表示中,有一类特殊编码数据属于NaN(not a number)类型,且NaN分为Signaling-NaN和Quiet-NAN。Risc-V架构规定,如果浮点运算的结果是一个NaN数,那么使用一个固定的NaN数,将之命名为Canonical-NaN。单精度浮点对应的Canonical-NaN数值为0x7fc00000,双精度浮点对应Canonical-NaN数值为0x7ff80000_00000000
如果同时支持单精度浮点(F扩展指令子集)和双精度浮点(D扩展指令子集),由于浮点通用寄存器的宽度为64位,Risc-V架构规定单精度浮点指令产生的32位结果写入浮点通用寄存器(64位)时,将结果写入低32位,而高位全部写入数值1,RiscV架构规定此种做法称之为NaN-Boxing。NaN-boxing可以发生在如下情形:
对于单精度浮点数的读(Load)/写(store)指令和传送(Move)指令(包括FLW,FSW,FMV.W.X,FMV.X.W),如果需要将32位的数值写入通用浮点寄存器,则采用NaN-boxing的方式;如果需要将浮点通用寄存器中的数值读出,则仅使用其低32位值。
对于单精度浮点运算(compute)和符号注入(sign-injection)指令,需要判断其操作数浮点寄存器中的值是否为合法的NaN-Boxed值,即高位都是1,如果是,则正常使用其低32位,如果不是,则将此操作数当作Canonical-NaN来使用。
对于整数至单精度的浮点转化指令(比如FCVT.S.X),则采用NaN-boxing的方式写回浮点通用寄存器。对于单精度浮点至整数的转化指令(比如FCVT.X.S),需要判断其操作数浮点寄存器中的值是否为合法的NaN-boxed值(即高位都为1)。如果是,则正常使用其低32位,如果不是,则将此操作数当作Canonical-NaN来使用。
浮点指令总共96条,指令格式如下列表。
| | | rs2 | rs1 | func3(rm) | rd | opcode | | | | | | |
name | type | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | RV32F | RV64F | RV32D | RV64D | RV32Q | RV64Q |
fadd.s | R | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fsub.s | R | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fmul.s | R | 0 | 0 | 0 | 1 | 0 | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fdiv.s | R | 0 | 0 | 0 | 1 | 1 | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fsgnj.s | R | 0 | 0 | 1 | 0 | 0 | 0 | 0 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fsgnjn.s | R | 0 | 0 | 1 | 0 | 0 | 0 | 0 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fsgnjx.s | R | 0 | 0 | 1 | 0 | 0 | 0 | 0 | | | | | | | | | | | 0 | 1 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fmin.s | R | 0 | 0 | 1 | 0 | 1 | 0 | 0 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fmax.s | R | 0 | 0 | 1 | 0 | 1 | 0 | 0 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fsqrt.s | R | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fadd.d | R | 0 | 0 | 0 | 0 | 0 | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fsub.d | R | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fmul.d | R | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fdiv.d | R | 0 | 0 | 0 | 1 | 1 | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fsgnj.d | R | 0 | 0 | 1 | 0 | 0 | 0 | 1 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fsgnjn.d | R | 0 | 0 | 1 | 0 | 0 | 0 | 1 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fsgnjx.d | R | 0 | 0 | 1 | 0 | 0 | 0 | 1 | | | | | | | | | | | 0 | 1 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fmin.d | R | 0 | 0 | 1 | 0 | 1 | 0 | 1 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fmax.d | R | 0 | 0 | 1 | 0 | 1 | 0 | 1 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.s.d | R | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.d.s | R | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fsqrt.d | R | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fadd.q | R | 0 | 0 | 0 | 0 | 0 | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fsub.q | R | 0 | 0 | 0 | 0 | 1 | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fmul.q | R | 0 | 0 | 0 | 1 | 0 | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fdiv.q | R | 0 | 0 | 0 | 1 | 1 | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fsgnj.q | R | 0 | 0 | 1 | 0 | 0 | 1 | 1 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fsgnjn.q | R | 0 | 0 | 1 | 0 | 0 | 1 | 1 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fsgnjx.q | R | 0 | 0 | 1 | 0 | 0 | 1 | 1 | | | | | | | | | | | 0 | 1 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fmin.q | R | 0 | 0 | 1 | 0 | 1 | 1 | 1 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fmax.q | R | 0 | 0 | 1 | 0 | 1 | 1 | 1 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.s.q | R | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.q.s | R | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.d.q | R | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.q.d | R | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fsqrt.q | R | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fle.s | R | 1 | 0 | 1 | 0 | 0 | 0 | 0 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
flt.s | R | 1 | 0 | 1 | 0 | 0 | 0 | 0 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
feq.s | R | 1 | 0 | 1 | 0 | 0 | 0 | 0 | | | | | | | | | | | 0 | 1 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fle.d | R | 1 | 0 | 1 | 0 | 0 | 0 | 1 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
flt.d | R | 1 | 0 | 1 | 0 | 0 | 0 | 1 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
feq.d | R | 1 | 0 | 1 | 0 | 0 | 0 | 1 | | | | | | | | | | | 0 | 1 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fle.q | R | 1 | 0 | 1 | 0 | 0 | 1 | 1 | | | | | | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
flt.q | R | 1 | 0 | 1 | 0 | 0 | 1 | 1 | | | | | | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
feq.q | R | 1 | 0 | 1 | 0 | 0 | 1 | 1 | | | | | | | | | | | 0 | 1 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.w.s | R | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.wu.s | R | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.l.s | R | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.lu.s | R | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fmv.x | R | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fclass.s | R | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.w.d | R | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.wu.d | R | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.l.d | R | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.lu.d | R | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fmv.x | R | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fclass.d | R | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.w.q | R | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.wu | R | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.l.q | R | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.lu.q | R | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fmv.x | R | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fclass.q | R | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 1 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.s.w | R | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.s.wu | R | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.s.l | R | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fcvt.s.lu | R | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fmv.w | R | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | √ | ✘ | ✘ | ✘ | ✘ | ✘ |
fcvt.d.w | R | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.d.wu | R | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.d.l | R | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | √ | ✘ | ✘ |
fcvt.d.lu | R | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | √ | ✘ | ✘ |
fmv.d.x | R | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fcvt.q.wu | R | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.q.wu | R | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.q.lu | R | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fcvt.q.lu | R | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | | | | | | rm | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fmv.q | R | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | | | | | 0 | 0 | 0 | | | | | | 1 | 0 | 1 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
| | imm | | | | | | | | | | | | | | | | | | | |
| | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | rs1 | func3 | rd | opcode | | | | | | |
name | type | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | RV32F | RV64F | RV32D | RV64D | RV32Q | RV64Q |
flw | I | | | | | | | | | | | | | | | | | | 0 | 1 | 0 | | | | | | 0 | 0 | 0 | 0 | 1 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fld | I | | | | | | | | | | | | | | | | | | 0 | 1 | 1 | | | | | | 0 | 0 | 0 | 0 | 1 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
flq | I | | | | | | | | | | | | | | | | | | 1 | 0 | 0 | | | | | | 0 | 0 | 0 | 0 | 1 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
| | imm | | | | | imm | | | | | | | | | | | | | | |
| | 11 | 10 | 9 | 8 | 7 | 6 | 5 | rs2 | rs1 | func3 | 4 | 3 | 2 | 1 | 0 | opcode | | | | | | |
name | type | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | RV32F | RV64F | RV32D | RV64D | RV32Q | RV64Q |
fsw | S | | | | | | | | | | | | | | | | | | 0 | 1 | 0 | | | | | | 0 | 1 | 0 | 0 | 1 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fsd | S | | | | | | | | | | | | | | | | | | 0 | 1 | 1 | | | | | | 0 | 1 | 0 | 0 | 1 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fsq | S | | | | | | | | | | | | | | | | | | 1 | 0 | 0 | | | | | | 0 | 1 | 0 | 0 | 1 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | | | | | | |
| | rs3 | | | rs2 | rs1 | func3(rm) | rd | opcode | | | | | | |
name | type | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | RV32F | RV64F | RV32D | RV64D | RV32Q | RV64Q |
fmadd.s | R4 | | | | | | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 0 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fmsub.s | R4 | | | | | | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 0 | 1 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fnmsub.s | R4 | | | | | | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 1 | 0 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fnmadd.s | R4 | | | | | | 0 | 0 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 1 | 1 | 1 | 1 | √ | √ | ✘ | ✘ | ✘ | ✘ |
fmadd.d | R4 | | | | | | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 0 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fmsub.d | R4 | | | | | | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 0 | 1 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fnmsub.d | R4 | | | | | | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 1 | 0 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fnmadd.d | R4 | | | | | | 0 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 1 | 1 | 1 | 1 | ✘ | ✘ | √ | √ | ✘ | ✘ |
fmadd.q | R4 | | | | | | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 0 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fmsub.q | R4 | | | | | | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 0 | 1 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fnmsub.q | R4 | | | | | | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 1 | 0 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |
fnmadd.q | R4 | | | | | | 1 | 1 | | | | | | | | | | | rm | | | | | | 1 | 0 | 0 | 1 | 1 | 1 | 1 | ✘ | ✘ | ✘ | ✘ | √ | √ |